5962G8957701VXA View Datasheet(PDF) - Aeroflex UTMC

Part Name

Description

Manufacturer

5962G8957701VXA

BCRTM

Aeroflex UTMC 

#1 Status Register (Read Only)

These bits indicate the BCRTM’s current status.

Bit

Number

Description

BIT 15

TEST. This bit reflects the inverse of the TEST output. It changes state simultaneously with the TEST output.

BIT 14

(RT,M) Remote Terminal (or Monitor) Active. Indicates that the BCRTM, in the Remote Terminal (or Monitor)

mode, is presently servicing a command. This bit reflects the inverse of the COMSTR pin.

BIT 13

(RT) Dynamic Bus Control Acceptance. This bit reflects the state of the Dynamic Bus Control

Acceptance bit in the RT status word (see Register 10 on page 16).

BIT 12

(RT) Terminal Flag bit is set in RT status word. This bit reflects the result of writing to Register 10, bit 11

BIT 11

(RT) Service Request bit is set in RT status word.This bit reflects the result of writing to Register 10, bit 10.

BIT 10

(RT) Busy bit is set in RT status word.This bit reflects the result of writing to Register 10, bits 9 or 14.

BIT 9

BIT is in progress.

BIT 8

Reset is in progress. This bit indicates that either a write to Register 12 has just occurred or the BCRTM has

just received a Reset Remote Terminal (#01000) Mode Code. This bit remains set less than 1ms.

BIT 7

BC/(RT) Mode. Indicates the current mode of operation. A reset operation must be performed when changing

between BC and RT modes.

BIT 6

Channel A/B. Indicates either the channel presently in use or the last channel used.

BIT 5

Subsystem Fail Indicator. Indicates receiving a subsystem fail signal from the host subsystem on the

SSYSF input.

BITs 4-1

Reserved.

BIT 0

(BC) Command Block Execution is in progress. (RT) Remote Terminal is in operation. This bit reflects bit 0 of

Register 0.

#2 Current Command Block Register (BC,M)/Remote Terminal Descriptor Space Address Register (RT)

(BC) This register contains the address of the head pointer of the Command Block being executed. Accessing a new Command

Block updates it.

(RT) The host CPU initializes this register to indicate the starting location of the RT Descriptor Space. The host must allocate

320 sequential locations following this starting address. For proper operation, this location must start on an I x 512 decimal

address boundary, where I is an integer multiple.

(M) This register contains the address of the control/status word of the current Monitor Command Block. Accessing a new

Command Block updates it.

#3 Polling Compare Register

In the polling mode, the CPU sets the Polling Compare Register to indicate the RT response word on which the BCRTM should

interrupt. This register is 11 bits wide, corresponding to bit times 9 through 19 of the RT’s 1553 status word response. The

sync, Remote Terminal Address, and parity bits are not included (see the section on Polling, page 32).

BCRTM-13

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