5962H8957701VYC View Datasheet(PDF) - Aeroflex UTMC
Part Name
Description
Manufacturer
5962H8957701VYC Datasheet PDF : 61 Pages
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CLOCK SIGNALS
NAME
CLK
MCLK
MCLKD2
PIN NUMBER
LCC
PGA
21
J5
TYPE ACTIVE
DESCRIPTION
TI
--
Clock. The 12MHz input clock requires a 50%
± 10% duty cycle with an accuracy of ± 0.01%. The accuracy
is required in order to meet the Manchester encoding/
decoding requirements of MIL-STD-1553.
65
C5
TI
--
Memory Clock. This is the input clock frequency the BCRTM
uses for memory accesses. The memory cycle time is equal
to two MCLK cycles. Therefore, RAM access time is
dependent upon the chosen MCLK frequency (6MHz
minimum, 12MHz maximum). Please see the BCRTM DMA
timing diagrams in this data sheet.
71
A3
TO
--
Memory Clock Divided by Two. This signal is the
Memory Clock input divided by two. It assists the
host subsystem in synchronizing DMA events.
POWER AND
NAME
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
PIN NUMBER
LCC
PGA
23
L6
43
F9
64 G13
84
C7
1
J3
22
N8
42
F10
63
B6
TYPE
PWR
PWR
PWR
PWR
GND
GND
GND
GND
ACTIVE
--
--
--
--
--
--
--
--
+5V
+5V
+5V
+5V
Ground
Ground
Ground
Ground
DESCRIPTION
BCRTM-11
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