5962G8957701VXA View Datasheet(PDF) - Aeroflex UTMC
Part Name
Description
Manufacturer
5962G8957701VXA Datasheet PDF : 61 Pages
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BIPHASE OUTPUTS
NAME
TAO
TAZ
PIN NUMBER
LCC
PGA
14
L2
13
K3
TYPE
TO
TO
ACTIVE
DESCRIPTION
-- Transmit Channel A One. This is the Manchester-encoded
true output to be connected to the Channel A bus transmitter
input. This signal is idle low.
-- Transmit Channel A Zero. This is the Manchester-encoded
complementary output to be connected to the Channel A bus
transmitter input. This signal is idle low.
TBO
TBZ
18
K6
TO
17
L4
TO
-- Transmit Channel B One. This is the Manchester-
encoded true output to be connected to the Channel B bus
transmitter input. This signal is idle low.
-- Transmit Channel B Zero. This is the Manchester-encoded
complementary output to be connected to the Channel B bus
transmitter input. This signal is idle low.
DMA SIGNALS
NAME
DMAR
DMAG
DMAGO
DMACK
BURST
TSCTL
PIN NUMBER
LCC
PGA
56
A10
57
A9
67
B5
58
B8
TYPE ACTIVE
DESCRIPTION
TTO
TI
ZL
DMA Request. The BCRTM issues this signal when access to
RAM is required. It goes inactive after receiving a DMAG
signal.
AL DMA Grant. This input to the BCRTM allows the
BCRT to access RAM. It is recognized 45ns before the rising
edge of MCLKD2.
TO
AL
DMA Grant Out. If DMAG is received but not needed, it
passes through to this output.
TTO
ZL
DMA Acknowledge. The BCRTM asserts this signal to confirm
receipt of DMAG, it stays low until memory access is complete.
74
A1
TO
AH
Burst (DMA Cycle). This indicates that the current
DMA cycle transfers at least two words; worst case is five words
plus a “dummy” word.
55
B9
TO
AL
Three-State Control. This signal indicates when the
BCRTM is actually accessing memory. The host subsystem’s
address and data lines must be in the high-impedance state when
the signals active. This signal assists in placing the external data
and address buffers into the high-impedance state.
BCRTM-10
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