HD404328U View Datasheet(PDF) - Hitachi -> Renesas Electronics

Part Name

Description

Manufacturer

HD404328U

4-Bit Microcontroller

Hitachi -> Renesas Electronics 

HD404328 Series

Timer C (TCCL and TCRL: $00A, TCCU and TCRU: $00B): Eight-bit write-only timer load register

(TCRL and TCRU) and read-only timer counter (TCCL and TCCU) located at the same addresses. The

eight-bit configuration consists of lower and upper digits located at sequential addresses. The operation of

timer C is basically the same as that of timer B. A block diagram of timer C is shown in figure 28.

The auto-reload function and prescaler division ratio of timer C depend on the state of timer mode register

C (TMC). Timer C is initialized to the value set in TMC by software, then is incremented by one at each

clock input. If an input is applied to timer C after it has reached $FF, an overflow is generated. In this

case, if the auto-reload function is enabled, timer C is initialized to its initial value; if auto-reload is

disabled, the timer is initialized to $00. The overflow sets the timer C interrupt request flag (IFTC: $002,

bit 2).

Timer C also functions as a watchdog timer. If a program routine runs out of control and an overflow is

generated while the watchdog on (WDON) flag is set, the MCU is reset. This error can be detected by

having the program control timer C reset before timer C reaches $FF.

The WDON can only have 1 written to it; it is cleared to 0 only by MCU reset.

Watchdog on

flag (WDON)

Watchdog timer

controller

System reset signal

Interrupt request

flag of timer C

(IFTC)

Clock

Timer latch

register C

(TLC)

Timer/counter C

(TCC)

Overflow

System øPER

clock

Selector

Prescaler S (PSS)

Timer load

register C upper

(TCRU)

Free-running/

reload timer

control signal

3

Timer load

register C lower

(TCRL)

Timer mode

register C (TMC)

Figure 28 Timer C Block Diagram

47

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