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HD404328U View Datasheet(PDF) - Hitachi -> Renesas Electronics

Part Name
Description
Manufacturer
HD404328U
Hitachi
Hitachi -> Renesas Electronics Hitachi
HD404328U Datasheet PDF : 94 Pages
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HD404328 Series
When the MCU is in watch mode or subactive mode, if the high level period before the falling edge of
INT0 is shorter than the interrupt frame, INT0 is not detected. Also, if the low level period after the
falling edge of INT0 is shorter than the interrupt frame, INT0 is not detected.
Edge detection is shown in figure 19. The level of the INT0 signal is sampled by a sampling clock.
When this sampled value changes to low from high, a falling edge is detected.
In figure 20, the level of the INT0 signal is sampled by an interrupt frame. In (a) the sampled value is
low at point A, and also low at point B. Therefore, a falling edge is not detected. In (b), the sampled
value is high at point A, and also high at point B. A falling edge is not detected in this case either.
When the MCU is in watch mode or subactive mode, keep the high level and low level period of INT0
longer than interrupt frame.
INT0
INT0
Sampling
High
Low
Low
Figure 19 Edge Detection
INT0
Interrupt
frame
A: Low
B: Low
a. High level period
Interrupt
frame
A: High
B: High
b. Low level period
Figure 20 Sampling Example
36
 

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