HD404328U View Datasheet(PDF) - Hitachi -> Renesas Electronics

Part Name

Description

Manufacturer

HD404328U

4-Bit Microcontroller

Hitachi -> Renesas Electronics 

HD404328 Series

Interrupts

The MCU has eight interrupt sources: two external signals (INT0 and INT1), three timer/counters (timer A,

timer B, and timer C), serial interface, zero-crossing detection, and A/D converter.

An interrupt request flag (IF), interrupt mask (IM), and vector address are provided for each interrupt

source, and an interrupt enable flag (IE) controls the entire interrupt process.

Vector addresses are shared by serial interface and A/D converter interrupt causes, so software must first

check which type of request has occurred.

Interrupt Control Bits and Interrupt Servicing: Locations $000–$003 and $020–$023 in RAM are

reserved for the interrupt control bits which can be accessed by RAM bit manipulation instructions.

The interrupt request flag (IF) cannot be set by software. MCU reset initializes the interrupt enable flag

(IE) and the IF to 0 and the interrupt mask (IM) to 1.

A block diagram of the interrupt control circuit is shown in figure 6, interrupt priorities and vector

addresses are listed in table 2, and interrupt processing conditions for the eight interrupt sources are listed

in table 3.

An interrupt request occurs when the IF is set to 1 and the IM is set to 0. If the IE is 1 at that point, the

interrupt is processed. Priority control logic generates the vector address assigned to that interrupt source.

The interrupt processing sequence is shown in figure 7 and an interrupt processing flowchart is shown in

figure 8. After an interrupt is acknowledged, the previous instruction is completed in the first cycle. The

IE is reset in the second cycle, the carry flag, status flag, and program counter values are pushed onto the

stack during the second and third cycles, and the program jumps to the vector address to execute the

instruction in the third cycle.

Program the JMPL instruction at each vector address, to branch the program to the start address of the

interrupt program, and reset the IF by a software instruction within the interrupt program.

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