5962G9855201QXA View Datasheet(PDF) - Aeroflex UTMC
Part Name
Description
Manufacturer
5962G9855201QXA Datasheet PDF : 62 Pages
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UART Transmitter Buffer Register
The UT69R000’s internal UART forms an 11-bit serial string
by combining a Start bit, the eight Data bits from the
Transmitter Buffer Register, an odd Parity bit, and a Stop bit.
Figure 9 shows the composition of the serial data string. The
UT69R000 transmits this serial string through the UARTOUT
pin at a rate of 9600 baud (TIMCLK = 12MHz).
Two status signals are associated with transmitting serial data.
These signals are the UART Transmitter Buffer Empty (TBE)
and UART Transmitter Register Empty (TE). TBE and TE are
both active high and provide information on the status of double
buffering the UART’s transmitted data. TBE and TE are read
from the System Status Register bits 2 and 1
respectively.
The UT69R000’s internal UART has a double-buffered data
transmission register (figure 10). The UT69R000 first loads
the data for transmission into the Transmitter Buffer Register.
If the UART Transmitter Register is empty, data from the
Transmit Buffer Register automatically transfers to the UART
Transmitter Register. At this time, the TBE bit goes active
indicating more data may be loaded into the Transmit Buffer
Register. This double-buffering scheme allows contiguous
transmission of serial data streams and also decreases the
UT69R000’s required overhead for the UART interface. The
UT69R000 loads the 8-bit Transmit Buffer Register via the
OTR Rd, TXMT instruction.
DIRECTION
OF DATA
FLOW OUT
OF THE
UT69R000
S T TTT TTTT
T X X XX X X XX
R D D D D DD D D
T 0 123 45 67
S
PT
AO
RP
Figure 9. UART Transmitter Data String
THE UT69R000’s INTERNAL
DATA BUS
UART TRANSMITTER BUFFER
REGISTER (TBR)
16
STATUS OF THE
T T T T T T T T TBR IS READ
D D D D D D D D X X X X X X X X FROM BIT 2
C C C C C C C C D D D D D D D D OF THE SYSTEM
7 6 5 4 3 2 1 0 STATUS REGISTER
DATA IS LOADED INTO THE
TBR WITH AN OUTPUT
REGISTER (OTR) INSTRUCTION
STATUS OF THE UART
TRANSMITTER REGISTER IS
READ FROM BIT 1
OF THE SYSTEM STATUS
REGISTER
UART TRANSMITTER
REGISTER
8
SPT T T T T T T T S
T AXXX XXXX XT
OR7 6 5 4 3 2 1 0 R
P
T
DIRECTION OF
DATA FLOW
Figure 10. The UT69R000 UART Double-Buffered Transmitter Register
9
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