5962F9855201QYA View Datasheet(PDF) - Aeroflex UTMC
Part Name
Description
Manufacturer
5962F9855201QYA Datasheet PDF : 62 Pages
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OPERAND DATA BUS CONTROL
Continued from page 40.
PIN NAME
DS
PIN NUMBER
FLTPK PGA
116
B2
TYPE
TTO
ACTIVE
AL
DESCRIPTION
Data Strobe. Indicates valid data is on the Operand Data
bus. The UT69R000 places DS in a high-impedance state
when it does not control the Operand buses.
INSTRUCTION MEMORY CONTROL
PIN NAME
OE
WE
PIN NUMBER
FLTPK PGA
42
R12
43
R13
TYPE
TTO
TTO
ACTIVE
AL
AL
DESCRIPTION
Output Enable Instruction Memory. This signal
allows memory to place data on the instruction data bus.
The Store Register to Instruction Memory (STRI)
instruction removes OE during the CK2 internal clock
cycle. OE enters a high-impedance state when the
UT69R000 is in the test mode (TEST = 0).
Write Enable Memory. This signal allows the
UT69R000 to write to instruction memory. The Store
Register to Instruction Memory (STRI) instruction
asserts WE during the CK2 internal clock cycle. WE
enters a high-impedance state when the UT69R000 is in
the test mode (TEST = 0).
UART CONTROL/TIMER CLOCK
PIN NAME
UARTIN
PIN NUMBER
FLTPK PGA
127
F1
TYPE
TUI
ACTIVE
AH
DESCRIPTION
UART Input. The UT69R000 receives serial data
through this input. The serial data is stored in the
UT69R000’s Receiver Buffer Register (RCVR). It is
tied to an internal pull-up resistor.
UARTOUT 128
G1 TTO
AH
UART Output. The serial data stored in the UT69R000’s
Transmitter Buffer Register (TXMT) is transmitted
through this output. The UART output is fixed at 9600
baud, with eight data bits, odd-parity, and one stop bit.
UARTOUT enters a high-impedance state when the
UT69R000 is in the test mode ( TEST=0). (9600 baud @
TIMCLK = 12 MHz)
Continued on page 42.
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