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5962G9583402VXA View Datasheet(PDF) - Aeroflex UTMC

Part Name
Description
Manufacturer
5962G9583402VXA
UTMC
Aeroflex UTMC UTMC
5962G9583402VXA Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
RIN1-
R IN1+
ROUT1
EN
ROUT2
RIN2+
RIN2-
VSS
1
16
VDD
2
15
3
14
UT54LVDS032
4
Receiver
13
5
12
R IN4-
RIN4+
ROUT4
EN
6
11
ROUT3
7
10
RIN3+
8
9
RIN3-
Figure 2. UT54LVDS032 Pinout
APPLICATIONS INFORMATION
The UT54LVDS032 receiver’s intended use is primarily in an
uncomplicated point-to-point configuration as is shown in
Figure 3. This configuration provides a clean signaling
environment for quick edge rates of the drivers. The receiver is
connected to the driver through a balanced media which may be
a standard twisted pair cable, a parallel pair cable, or simply
PCB traces. Typically, the characteristic impedance of the media
is in the range of 100. A termination resistor of 100should
be selected to match the media and is located as close to the
receiver input pins as possible. The termination resistor converts
the current sourced by the driver into voltages that are detected
by the receiver. Other configurations are possible such as a
multi-receiver configuration, but the effects of a mid-stream
connector(s), cable stub(s), and other impedance discontinuities,
as well as ground shifting, noise margin limits, and total
termination loading must be taken into account.
TRUTH TABLE
Enables
EN
EN
L
H
All other combinations
of ENABLE inputs
Input
RIN+ - RIN-
X
VID > 0.1V
VID < -0.1V
Full Fail-safe
OPEN/SHORT or
Terminated
Output
ROUT
Z
H
L
H
PIN DESCRIPTION
Pin No.
2, 6, 10, 14
1, 7, 9, 15
3, 5, 11, 13
4
Name
RIN+
RIN-
ROUT
EN
12
EN
16
VDD
8
VSS
Description
Non-inverting receiver input pin
Inverting receiver input pin
Receiver output pin
Active high enable pin, OR-ed
with EN
Active low enable pin, OR-ed
with EN
Power supply pin, +5V + 10%
Ground pin
ENABLE
DATA
INPUT
1/4 UT54LVDS031
RT 100
1/4 UT54LVDS032
+
- DATA
OUTPUT
Figure 3. Point-to-Point Application
The UT54LVDS032 differential line receiver is capable of
detecting signals as low as 100mV, over a + 1V common-mode
range centered around +1.2V. This is related to the driver offset
voltage which is typically +1.2V. The driven signal is centered
around this voltage and may shift +1V around this center point.
The +1V shifting may be the result of a ground potential
difference between the driver’s ground reference and the
receiver’s ground reference, the common-mode effects of
coupled noise or a combination of the two. Both receiver input
pins should honor their specified operating input voltage range
of 0V to +2.4V (measured from each pin to ground).
2
 

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