STE48NM50 View Datasheet(PDF) - STMicroelectronics
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STE48NM50 Datasheet PDF : 9 Pages
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STE48NM50
ELECTRICAL CHARACTERISTICS (CONTINUED)
Table 7: Dynamic
Symbol
Parameter
Test Conditions
gfs (1)
Forward Transconductance VDS > ID(on) x RDS(on)max, ID = 24A
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS = 25V, f = 1 MHz, VGS = 0
RG
Gate Input Resistance
f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
td(on)
tr
td(off)
tf
tc
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Cross-over Time
VDD = 250V, ID = 24 A
RG = 4.7Ω VGS = 10 V
(see Figure 14)
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 400V, ID = 48 A,
VGS = 10V
(see Figure 18)
Min.
Typ.
20
3700
610
80
Max.
Unit
S
pF
pF
pF
1.7
Ω
40
ns
35
ns
18
ns
23
ns
44
ns
87
117 nC
23
nC
42
nC
Table 8: Source Drain Diode
Symbol
Parameter
Test Conditions
ISD
Source-drain Current
ISDM (2) Source-drain Current (pulsed)
VSD (1) Forward On Voltage
ISD = 48 A, VGS = 0
trr
Reverse Recovery Time
ISD = 40 A, di/dt = 100 A/µs,
Qrr
Reverse Recovery Charge VDD = 100 V, Tj = 25°C
Irrm
Reverse Recovery Current (see Figure 16)
trr
Reverse Recovery Time
ISD = 40 A, di/dt = 100 A/µs,
Qrr
Reverse Recovery Charge VDD = 100 V, Tj = 150°C
Irrm
Reverse Recovery Current (see Figure 16)
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Min.
Typ.
520
7.8
30
680
11.2
33
Max.
48
192
1.5
Unit
A
A
V
ns
µC
A
ns
µC
A
3/9
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