Note that the ratio in Figure 39 is calculated as amps out/volts
in. Noise on the analog power supply has the effect of modulat-
ing the internal switches, and therefore the output current. The
voltage noise on AVDD, therefore, will be added in a nonlinear
manner to the desired IOUT. Due to the relative different size
of these switches, the PSRR is very code dependent. This can
produce a mixing effect that can modulate low frequency power
supply noise to higher frequencies. Worst-case PSRR for either
one of the differential DAC outputs will occur when the full-
scale current is directed toward that output. As a result, the
PSRR measurement in Figure 39 represents a worst-case condi-
tion in which the digital inputs remain static and the full-scale
output current of 20 mA is directed to the DAC output being
measured.
An example serves to illustrate the effect of supply noise on the
analog supply. Suppose a switching regulator with a switching
frequency of 250 kHz produces 10 mV of noise and, for
simplicity’s sake (ignoring harmonics), all of this noise is con-
centrated at 250 kHz. To calculate how much of this undesired
noise will appear as current noise superimposed on the DAC’s
full-scale current, IOUTFS, one must determine the PSRR in dB
using Figure 39 at 250 kHz. To calculate the PSRR for a given
RLOAD, such that the units of PSRR are converted from A/V to
V/V, adjust the curve in Figure 39 by the scaling factor 20 Ω log
(RLOAD). For instance, if RLOAD is 50 Ω, the PSRR is reduced
by 34 dB (that is, PSRR of the DAC at 250 kHz, which is 85 dB
in Figure 39, becomes 51 dB VOUT/VIN).
AD9744
Proper grounding and decoupling should be a primary objec-
tive in any high speed, high resolution system. The AD9744
features separate analog and digital supplies and ground pins to
optimize the management of analog and digital ground currents
in a system. In general, AVDD, the analog supply, should be
decoupled to ACOM, the analog common, as close to the chip
as physically possible. Similarly, DVDD, the digital supply,
should be decoupled to DCOM as close to the chip as physically
possible.
For those applications that require a single 3.3 V supply for both
the analog and digital supplies, a clean analog supply may be
generated using the circuit shown in Figure 40. The circuit con-
sists of a differential LC filter with separate power supply and
return lines. Lower noise can be attained by using low ESR type
electrolytic and tantalum capacitors.
TTL/CMOS
LOGIC
CIRCUITS
FERRITE
BEADS
100µF
ELECT.
10µF–22µF
TANT.
0.1µF
CER.
AVDD
ACOM
3.3V
POWER SUPPLY
Figure 40. Differential LC Filter for Single 3.3 V Applications
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