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STA014T View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
STA014T Datasheet PDF : 45 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
®
STA014 STA014B STA014T
MPEG
2.5
LSARYESRWIOII WAU®DPIOOSDTEPCROODCEERSWSIINTGH
ADPCM AND
CAPABILITY
PRODUCT PREVIEW
The Device incorporates the SRS
WOW® Technology under li-
cence from SRS Labs, Inc.
SINGLE CHIP MPEG2 LAYER 3 DECODER
SUPPORTING:
- All features specified for Layer III in ISO/IEC
11172-3 (MPEG 1 Audio)
- All features specified for Layer III in ISO/IEC
13818-3.2 (MPEG 2 Audio)
- Lower sampling frequencies syntax extension,
(not specified by ISO) called MPEG 2.5
DECODES LAYER III STEREO CHANNELS,
DUAL CHANNEL, SINGLE CHANNEL
(MONO)
SUPPORTING ALL THE MPEG 1 & 2 SAM-
PLING FREQUENCIES AND THE EXTEN-
SION TO MPEG 2.5:
48, 44.1, 32, 24, 22.05, 16, 12, 11. 025, 8 KHz
ACCEPTS MPEG 2.5 LAYER III ELEMEN-
TARY COMPRESSED BITSTREAM WITH
DATA RATE FROM 8 Kbit/s UP TO 320 Kbit/s
ADPCM CODEC CAPABILITIES:
- sample frequency from 8 kHz to 32 kHz
- sample size from 8 bits to 32 bits
- encoding algorithm: DVI,
ITU-G726 pack (G723-24, G721,G723-40)
- Tone control and fast-forward capability
SRS WOW(1) TECHNOLOGY CAN BE USED
AS POSTPROCESSING. SUPPORT FOR
DIFFERENT SPEAKERS TYPES:
- headphone
- medium
- large
WOW(1) TRUEBASS AND FOCUS CAN BE
INDIPENDENTLY ADJUSTED
EASY PROGRAMMABLE GPSO INTERFACE
FOR ENCODED DATA UP TO 5Mbit/s
(TQFP44 & LFBGA 64)
DIGITAL VOLUME
BASS & TREBLE CONTROL
SERIAL BITSTREAM INPUT INTERFACE
EASY PROGRAMMABLE ADC INPUT INTERFACE
ANCILLARY DATA EXTRACTION VIA I2C IN-
TERFACE.
SERIAL PCM OUTPUT INTERFACE (I2S
AND OTHER FORMATS)
ORDERING NUMBERS: STA014 (SO28)
STA014T (TQFP44)
STA014B (LFBGA 64)
PLL FOR INTERNAL CLOCK AND FOR OUT-
PUT PCM CLOCK GENERATION
CRC CHECK AND SYNCHRONISATION ER-
ROR DETECTION WITH SOFTWARE INDI-
CATORS
I2C CONTROL BUS
LOW POWER 2.4V CMOS TECHNOLOGY
WIDE RANGE OF EXTERNAL CRYSTALS
FREQUENCIES SUPPORTED
APPLICATIONS
PC SOUND CARDS
MULTIMEDIA PLAYERS
VOICE RECORDERS
DESCRIPTION
The STA014 is a fully integrated high flexibility
MPEG Layer III Audio Decoder, capable of de-
coding Layer III compressed elementary streams,
as specified in MPEG 1 and MPEG 2 ISO stand-
ards. The device decodes also elementary streams
compressed by using low sampling rates, as speci-
fied by MPEG 2.5. STA014 receives the input data
through a Serial Input Interface. The decoded sig-
nal is a stereo, mono, or dual channel digital output
that can be sent directly to a D/A converter, by the
PCM Output Interface. This interface is software
programmable to adapt the STA014 digital output
to the most common DACs architectures used on
the market. The functional STA014 chip partitioning
is described in Fig.1a and Fig.1b.
July 2000
1/45
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
(1) in order to enable SRS WOW algorithm a mandatory configuration file is required.
 

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