ADSP-2185NBSTZ-320 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADSP-2185NBSTZ-320 Datasheet PDF : 48 Pages
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ADSP-218xN
Bus Request–Bus Grant
Table 17. Bus Request–Bus Grant
Parameter
Min
Max
Unit
Timing Requirements:
tBH
BR Hold after CLKOUT High1
tBS
BR Setup before CLKOUT Low1
Switching Characteristics:
0.25tCK + 2
ns
0.25tCK + 8
ns
tSD
CLKOUT High to xMS, RD, WR Disable2
tSDB
xMS, RD, WR Disable to BG Low
tSE
BG High to xMS, RD, WR Enable
tSEC
xMS, RD, WR Enable to CLKOUT High
tSDBH
xMS, RD, WR Disable to BGH Low3
tSEH
BGH High to xMS, RD, WR Enable3
0.25tCK + 8
ns
0
ns
0
ns
0.25tCK – 3
ns
0
ns
0
ns
1 BR is an asynchronous signal. If BR meets the setup/hold requirements, it will be recognized during the current clock cycle; otherwise the signal will be recognized on
the following cycle. Refer to the ADSP-2100 Family User’s Manual for BR/BG cycle relationships.
2 xMS = PMS, DMS, CMS, IOMS, BMS.
3 BGH is asserted when the bus is granted and the processor or BDMA requires control of the bus to continue.
tBH
CLKOUT
BR
CLKOUT
PMS, DMS
BMS, RD
CMS, WR,
IOMS
BG
BGH
tBS
tSD
tSDB
tSDBH
Figure 28. Bus Request–Bus Grant
tSEC
tSE
tSEH
Rev. A | Page 30 of 48 | August 2006
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