ADSP-2185NBSTZ-320 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADSP-2185NBSTZ-320

0.3-2.2V; instruction rate 80MHz; DSP microcomputer

Analog Devices 

ADSP-218xN

Interrupts and Flags

Table 16. Interrupts and Flags

Parameter

Min

Max

Unit

Timing Requirements:

tIFS

IRQx, FI, or PFx Setup before CLKOUT Low1, 2, 3, 4

0.25tCK + 10

ns

tIFH

IRQx, FI, or PFx Hold after CLKOUT High1, 2, 3, 4

0.25tCK

ns

Switching Characteristics:

tFOH

Flag Output Hold after CLKOUT Low5

tFOD

Flag Output Delay from CLKOUT Low5

0.5tCK – 5

ns

0.5tCK + 4

ns

1 If IRQx and FI inputs meet tIFS and tIFH setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on the

following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the ADSP-218x DSP Hardware Reference for further information on

interrupt servicing.)

2 Edge-sensitive interrupts require pulse widths greater than 10 ns; level-sensitive interrupts must be held low until serviced.

3 IRQx = IRQ0, IRQ1, IRQ2, IRQL0, IRQL1, IRQLE.

4 PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.

5 Flag Outputs = PFx, FL0, FL1, FL2, FO.

CLKOUT

FLAG

OUTPUTS

IRQx

FI

PFx

tFOD

tFOH

tIFH

tIFS

Figure 27. Interrupts and Flags

Rev. A | Page 29 of 48 | August 2006

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