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REF193GRU View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
REF193GRU Datasheet PDF : 23 Pages
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5V
100
90
10
0%
200mV
200s
Figure 12. Line Transient Response
REF19x Series
35
30
25
20
15
10
5
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
REF195 DROPOUT VOLTAGE – V
Figure 13. Dropout Voltage vs. Load Current
+V
VOUT
SHUTDOWN
GND
Figure 14. Simplified Schematic
APPLICATIONS SECTION
Output Short Circuit Behavior
The REF19x family of devices is totally protected from damage
due to accidental output shorts to GND or to V+. In the event
of an accidental short circuit condition, the reference device will
shutdown and limit its supply current to 100 µA.
Device Power Dissipation Considerations
The REF19x family of references is capable of delivering load
currents to 30 mA with an input voltage that ranges from 3.3 V
to 15 V. When these devices are used in applications with large
input voltages, care should be exercised to avoid exceeding these
devices’ maximum internal power dissipation. Exceeding the
published specifications for maximum power dissipation or
junction temperature could result in premature device failure.
The following formula should be used to calculate a device’s
maximum junction temperature or dissipation:
PD
=
TJ – TA
θ JA
In this equation, TJ and TA are the junction and ambient tem-
peratures, respectively, PD is the device power dissipation and
θJA is the device package thermal resistance.
Output Voltage Bypassing
For stable operation, low dropout voltage regulators and refer-
ences, in general, require a bypass capacitor connected from
their VOUT pins to their GND pins. Although the REF19x
family of references is capable of stable operation with capacitive
loads exceeding 100 µF, a 1 µF capacitor is sufficient to guaran-
tee rated performance. The addition of a 0.1 µF ceramic ca-
pacitor in parallel with the bypass capacitor will improve load
current transient performance. For best line voltage transient
performance, it is recommended that the voltage inputs of these
devices be bypassed with a 10 µF electrolytic capacitor in paral-
lel with a 0.1 µF ceramic capacitor.
Sleep Mode Operation
All REF19x devices include a sleep capability that is TTL/CMOS
level compatible. Internal to the REF19x at the SLEEP pin, a
pull-up current source to VIN is connected. This permits the
SLEEP pin to be driven from an open collector/drain driver.
A logic LOW or a zero volt condition on the SLEEP pin is re-
quired to turn the output stage OFF. During sleep, the output
of the references becomes a high impedance state where its
potential would then be determined by external circuitry. If the
sleep feature is not used, it is recommended that the SLEEP pin
be connected to VIN (Pin 2).
Basic Voltage Reference Connections
The circuit in Figure 15 illustrates the basic configuration for
the REF19x family of references. Note the 10 µF/0.1 µF bypass
network on the input and the 1 µF/0.1 µF bypass network on the
output. It is recommended that no connections be made to
Pins 1, 5, 7 and 8. If the sleep feature is not required, Pin 3
should be connected to VIN.
10F
NC 1
VIN
2
0.1F
SLEEP 3
REF19x
8 NC
7 NC
6
4
5 NC
OUTPUT
1F
TANT
0.1F
Figure 15. Basic Voltage Reference Configuration
REV. D
–17–
 

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