PM8313-RI View Datasheet(PDF) - PMC-Sierra

Part Name

Description

Manufacturer

PM8313-RI

M13 MULTIPLEXER

PMC-Sierra 

DATA SHEET

PMC-920702

ISSUE 5

PM8313 D3MX

M13 MULTIPLEXER

• Optionally inserts the C-bit parity mode path maintenance data link signal

from a 28.2 kbit/s serial input.

Each M23 multiplexer section:

• Multiplexes 7 DS2 bit streams into a single M23 format DS3 bit stream.

• Performs required bit stuffing including generation of C-bits.

• Includes required FIFO buffers for rate adaptation in the multiplex path.

• Allows insertion of per DS2 payload loopback requests encoded in the

transmitted C-bits to be activated or cleared under microprocessor control.

• Provides generated DS2 clock for use in integrated M13 or C-bit parity

multiplex applications.

• Demultiplexes a single M23 format DS3 bit stream into 7 DS2 bit streams.

• Performs required bit destuffing including interpretation of C-bits.

• Detects per DS2 payload loopback requests encoded in the received C-bits.

• Allows per DS2 payload loopback to be activated or cleared under

microprocessor control.

• Allows per DS2 alarm indication signal (AIS) to be activated or cleared for

either direction under microprocessor control.

• Allows DS2 alarm indication signal (AIS) to be activated or cleared in the

demultiplex direction automatically upon loss of DS3 frame alignment or

signal.

• Supports C-bit parity DS3 format.

Each DS2 framer and M12 multiplexer section:

• Supports two asynchronous multiplexing standards: the combination of four

DS1 bit streams into a single M12 format DS2 bit stream and the combination

of three 2048 kbit/s tributaries into a 6312 kbit/s high speed signal according

to CCITT Recommendation G.747.

• Frames to either a DS2 or G.747 signal.

3

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