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74LCX373CW 查看數據表(PDF) - Fairchild Semiconductor

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74LCX373CW Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs Fairchild
Fairchild Semiconductor Fairchild
74LCX373CW Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
February 1994
Revised April 1999
74LCX373
Low Voltage Octal Transparent Latch with 5V Tolerant
Inputs and Outputs
General Description
The LCX373 consists of eight latches with 3-STATE out-
puts for bus organized system applications. The device is
designed for low voltage (3.3V or 2.5V) VCC applications
with capability of interfacing to a 5V signal environment.
The LCX373 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s 8.0 ns tPD max (VCC = 3.3V), 10 µA ICC max
s Power-down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s ±24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human Body Model > 2000V
Machine Model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX373WM
74LCX373SJ
74LCX373MSA
Package Number
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MSA20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LCX373MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation DS011995.prf
www.fairchildsemi.com
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