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74LCX16646MTD View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
74LCX16646MTD Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Connection Diagram
Truth Table
(Note 2)
OE1
DIR1
Inputs
CPAB1 CPBA1 SAB1
SBA1
Data I/O
A0–7 B0–7
Output Operation Mode
H
H
H
X
X
X
H or L
  X
H or L
X
X
X
X
L
L
H
H
X
X
X
L
L
L
L
H
H
H or L
X
X
H
H
L
L
L
L
X
X
X
X
X
L
L
L
L
X
X
H or L
X
X
 H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition.
X
Isolation
X
Input Input Clock An Data into A Register
X
Clock Bn Data Into B Register
X
An to Bn Real Time (Transparent Mode)
X
Input Output Clock An Data to A Register
X
A Register to Bn (Stored Mode)
X
Clock An Data into A Register and Output to Bn
L
Bn to An Real Time (Transparent Mode)
L Output Input Clock Bn Data into B Register
H
B Register to An (Stored Mode)
H
Clock Bn into B Register and Output to An
Note 2: The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled;
i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs. Also applies to data I/O (A and B: 8-15) and
#2 control pins.
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