ADP3408ARU-2.5 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADP3408ARU-2.5 Datasheet PDF : 20 Pages
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ADP3408
ICHG
VBAT
EOC
TIME
Figure 6. End of Charge
The baseband processor can either let the charger continue to
charge the battery for an additional amount of time or terminate
the charging. To terminate the charging, the processor must pull
the GATEIN and CHGEN pins high.
NiMH Charging
For NiMH charging, the processor must pull the CHGEN pin
high. This disables the internal Li+ mode control of the gate
drive pin. The gate drive must now be controlled by the base-
band processor. By pulling GATEIN high, the GATEDR pin is
driven high, turning the PMOS off. By pulling the GATEIN pin
low, the GATEDR pin is driven low, and the PMOS is turned
on. So, by pulsing the GATEIN input, the processor can charge
a NiMH battery. Note that when charging NiMH cells, a cur-
rent-limited adapter is required.
During the PMOS off periods, the battery voltage needs to be
monitored through the MVBAT pin. The battery voltage is
continually polled until the final battery voltage is reached, at
which time the charge can either be terminated or the frequency
of the pulsing reduced. An alternative method of determining
the end of charge is to monitor the temperature of the cells and
terminate the charging when a rapid rise in temperature is detected.
Battery Voltage Monitoring
The battery voltage can be monitored at MVBAT during charg-
ing and discharging to determine the condition of the battery.
An internal resistor divider can be connected to BATSNS when
both the digital and analog baseband sections are powered up. To
enable MVBAT, both PWRONIN and TCXOEN must be high.
The ratio of the voltage divider is selected so that the 2.4 V
maximum input of the AD6521’s auxiliary ADC will correspond
with the maximum battery voltage of 5.5 V. The divider will be
disconnected from the battery when the baseband sections are
powered down.
APPLICATION INFORMATION
Input Capacitor Selection
For the input (VBAT, VBAT2, and VRTCIN) of the ADP3408,
a local bypass capacitor is recommended. Use a 10 µF, low
ESR capacitor. Multilayer ceramic chip (MLCC) capacitors
provide the best combination of low ESR and small size, but
may not be cost effective. A lower cost alternative may be to use
a 10 µF tantalum capacitor with a small (1 µF to 2 µF) ceramic
in parallel.
Separate inputs for the SIM LDO and the RTC LDO are supplied
for additional bypassing or filtering. The SIM LDO has VBAT2
as its input and the RTC LDO has VRTCIN.
LDO Capacitor Selection
The performance of any LDO is a function of the output capacitor.
The core, memory, SIM, and analog LDOs require a 2.2 µF
capacitor, and the TCXO LDO requires a 0.22 µF capacitor.
Larger values may be used, but the overshoot at startup will
increase slightly. If a larger output capacitor is desired, be sure
to check that the overshoot and settling time are acceptable for
the application.
All the LDOs are stable with a wide range of capacitor types and
ESR (anyCAP® technology). The ADP3408 is stable with extremely
low ESR capacitors (ESR ~ 0), such as Multilayer Ceramic
Capacitors (MLCC), but care should be taken in their selection.
Note that the capacitance of some capacitor types show wide
variations over temperature or with dc voltage. A good quality
dielectric capacitor, X7R or better, is recommended.
The RTC LDO can have a rechargeable coin cell or an electric
double-layer capacitor as a load, but an additional 0.1 µF ceramic
capacitor is recommended for stability and best performance.
RESET Capacitor Selection
RESET is held low at power-up. An internal power good signal
starts the reset delay when the core LDO is up. The delay is set
by an external capacitor on RESCAP:
tRESET
= 1.2 ms
nF
× CRESCAP
(4)
A 100 nF capacitor will produce a 120 ms reset delay. The
current capability of RESET is minimal (a few hundred nA)
when VCORE is off to minimize power consumption. When
VCORE is on, RESET is capable of driving 500 µA.
Setting the Charge Current
The ADP3408 is capable of charging both lithium ion and
NiMH batteries. For NiMH batteries, the charge current is
limited by the adapter. For lithium ion batteries, the charge
current is programmed by selecting the sense resistor, R1.
The lithium ion charge current is calculated using:
ICHR
= VSENSE
R1
= 160 mV
R1
(5)
Where VSENSE is the high current limit threshold voltage. Or if
the charge current is known, R1 can be found.
R1 = VSENSE = 160 mV
ICHR
ICHR
(6)
Similarly, the trickle charge current and the end of charge cur-
rent can be calculated:
ITRICKLE
= VSENSE
R1
=
20 mV
R1
,
I EOC
=
14 mV
R1
(7)
Example: Assume an 800 mAh capacity lithium ion battery and a 1C
charge rate. R1 = 200 mΩ, ITRICKLE = 100 mA, and IEOC = 70 mA.
anyCAP is a registered trademark of Analog Devices Inc.
–16–
REV. A
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