SLUSAH0C – OCTOBER 2011 – REVISED JUNE 2015
Device Functional Modes (continued)
When the VSTOR voltage reaches VSTOR_CHGEN, the main boost charger starts up. When the VSTOR
voltage rises to the VBAT_UV threshold, the PMOS switch between VSTOR and VBAT turns on, which provides
additional loading on VSTOR and could result in the VSTOR voltage dropping below both the VBAT_UV
threshold and the VSTOR_CHGEN voltage, especially if system loads on VSTOR or VBAT are active during this
time. Therefore, it is not uncommon for the VSTOR voltage waveform to have incremental pulses (i.e. stair steps)
as the IC cycles between cold-start and main boost charger operation before eventually maintaing VSTOR above
The cold start circuit initially clamps VIN_DC to VIN(CS) = 330 mV typical. If sufficient input power (i.e.,output
current from the harvester clamped to VIN(CS)) is not available, it is possible that the cold start circuit cannot
raise the VSTOR voltage above VSTOR_CHGEN in order for the main boost conveter to start up. It is highly
recommended to add an external PFET between the system load and VSTOR. An inverted VBAT_OK signal can
be used to drive the gate of this system-isolating, external PFET. See the Power Supply Recommendations
section for guidance on minimum input power requirements.
8.4.2 Main Boost Charger Enabled (VSTOR > VSTOR_CHGEN, VIN_DC > VIN(DC) and EN = LOW )
One way to avoid cold start is to attach a partially charged storage element as shown in Figure 13.
Figure 13. Charger Operation after a Partially Charged Storage Element
is Attached and Harvester Power is Available
When no input source is attached, the VSTOR node should be discharged to ground before attaching a storage
element. Hot-plugging a storage element that is charged (e.g., the battery protector PFET is closed) and with the
VSTOR node more than 100 mV above ground results in the PFET between VSTOR and VBAT remaining off
until an input source is attached.
Assuming the voltages on VSTOR and VBAT are both below 100mV, when a charged storage element is
attached (i.e. hot-plugged) to VBAT, the IC.
1. first turns on the internal PFET between the VSTOR and VBAT pins for tBAT_HOT_PLUG (45ms) in order to
charge VSTOR to VSTOR_CHGEN then turns off the PFET to prevent the battery from overdischarge,
2. then performs an initialization pulse on VRDIV to reset the feedback voltages,
3. then disables the charger for 32 ms (typical) to allow the VIN_DC voltage to rise to the harvester's open-
circuit voltage which will be used as the input voltage regulation reference voltage until the next MPPT
sampling cycle and
4. lastly performs its first feedback sampling using VRDIV, approximately 64 ms after the initialization pulse.
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