SLUSAH0C – OCTOBER 2011 – REVISED JUNE 2015
Feature Description (continued)
VBAT_OK_PROG = VBIASç1 +
è ROK1 ø
When the battery voltage is increasing, the threshold is set by Equation 5:
VBIAS ç1 +
The sum of the resistors are recommended to be approximately 10 MΩ i.e., ROK1 + ROK2 + ROK3= 10 MΩ.
Spreadsheet SLURAQ1 provides help on sizing and selecting the resistors.
The logic high level of this signal is equal to the VSTOR voltage and the logic low level is ground. The logic high
level has ~20 KΩ internally in series to limit the available current to prevent MCU damage until it is fully powered.
The VBAT_OK_PROG threshold must be greater than or equal to the UV threshold. Figure 11 shows the relative
position of the various threshold voltages.
VSTOR(ABS MAX) = 5.5V
Charging stops to
Signal to turn on
system load on
to VSTOR to
Main Boost Charger on
(if VIN_DC > 130mV)
VBAT_OV = resistor programmable
VBAT_OV + internal VBAT_OV_HYST
VBAT_OK_HYST = resistor programmable
VBAT_OK = resistor programmable
VBAT_UV + internal VBAT_UV_HYST
VBAT_UV = resistor programmable
VSTOR_CHGEN = 1.8 V typical
Signal to turn off
system load on
from VSTOR to
Cold Start Circuit on
(if VIN_DC > 330 mV)
Figure 11. Summary of VSTOR Threshold Voltages
8.3.5 Nano-Power Management and Efficiency
The high efficiency of the bq25504 charger is achieved via the proprietary Nano-Power management circuitry
and algorithm. This feature essentially samples and holds the VSTOR voltage in order to reduce the average
quiescent current. That is, the internal circuitry is only active for a short period of time and then off for the
remaining period of time at the lowest feasible duty cycle. A portion of this feature can be observed in Figure 19
where the VRDIV node is monitored. Here the VRDIV node provides a connection to the VSTOR voltage (first
pulse) and then generates the reference levels for the VBAT_OV and VBAT_OK resistor dividers for a short
period of time. The divided down values at each pin arecompared against VBIAS as part of the hysteretic control.
Since this biases a resistor string, the current through these resistors is only active when the Nano-Power
management circuitry makes the connection—hence reducing the overall quiescent current due to the resistors.
This process repeats every 64 ms.
The bq25504's boost charger efficiency is shown for various input power levels in Figure 1 through Figure 7. All
data points were captured by averaging the overall input current. This must be done due to the periodic biasing
scheme implemented via the Nano-Power management circuitry. In order to properly measure the resulting input
current when calculating the output to input efficiency, the input current efficiency data was gathered using a
source meter set to average over at least 50 samples. Quiescent current curves into VSTOR over temperature
and voltage is shown at Figure 8.
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