K10P81M100SF2V2 View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

K10P81M100SF2V2

K10 Sub-Family

NXP Semiconductors. 

Peripheral operating requirements and behaviors

6.6.1 ADC electrical specifications

The 16-bit accuracy specifications listed in Table 27 and Table 28 are achievable on the

differential pins ADCx_DP0, ADCx_DM0, ADCx_DP1, ADCx_DM1, ADCx_DP3, and

ADCx_DM3.

The ADCx_DP2 and ADCx_DM2 ADC inputs are connected to the PGA outputs and are

not direct device pins. Accuracy specifications for these pins are defined in Table 29 and

Table 30.

All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy

specifications.

6.6.1.1 16-bit ADC operating conditions

Table 27. 16-bit ADC operating conditions

Symbol

VDDA

ΔVDDA

ΔVSSA

VREFH

VREFL

VADIN

Description

Supply voltage

Supply voltage

Ground voltage

ADC reference

voltage high

ADC reference

voltage low

Input voltage

Conditions

Absolute

Delta to VDD (VDD – VDDA)

Delta to VSS (VSS – VSSA)

• 16-bit differential mode

• All other modes

CADIN Input capacitance

• 16-bit mode

• 8-bit / 10-bit / 12-bit

modes

Min.

1.71

-100

-100

1.13

VSSA

VREFL

VREFL

—

—

Typ.1

—

0

0

VDDA

VSSA

—

—

8

4

Max.

3.6

+100

+100

VDDA

VSSA

31/32 *

VREFH

VREFH

10

5

RADIN

RAS

Input resistance

Analog source

resistance

13-bit / 12-bit modes

fADCK < 4 MHz

—

2

5

—

—

5

fADCK

fADCK

Crate

ADC conversion ≤ 13-bit mode

clock frequency

1.0

—

ADC conversion 16-bit mode

clock frequency

2.0

—

ADC conversion ≤ 13-bit modes

rate

No ADC hardware averaging 20.000

—

Continuous conversions

enabled, subsequent

conversion time

Table continues on the next page...

18.0

12.0

818.330

Unit

V

mV

mV

V

V

V

pF

kΩ

kΩ

MHz

MHz

Ksps

Notes

2

2

3

4

4

5

K10 Sub-Family Data Sheet, Rev. 3, 6/2013.

38

Freescale Semiconductor, Inc.

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