IDT72511 View Datasheet(PDF) - Integrated Device Technology

Part Name

Description

Manufacturer

IDT72511

PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18

Integrated Device Technology 

IDT72511/IDT72521

BIDIRECTIONAL FIRST-IN FIRST-OUT MEMORY

MILITARY AND COMMERCIAL TEMPERATURE RANGES

The Command Register is written by setting CSA = 0, A1 =

1, A0 = 1. Commands written into the BiFIFO have a 4-bit

opcode (bit8 – bit 11) and a 3-bit operand (bit 0 – bit 2) as

shown in Figure 3. The commands can be used to reset the

BiFIFO, to select the Configuration Register, to perform intel-

ligent reread/rewrite, to set the Port B DMA direction, to set

the Status Register format, and to modify the Port B Read

and Write Pointers. The command opcodes are shown in

Table 2.

The reset command initializes different portions of the

BiFIFO depending on the command operand. Table 3 shows

the reset command operands.

The configuration Register address is set directly by the

command operands shown in Table 4.

Intelligent reread/rewrite is performed by interchanging

the Port B Read Pointer with the Reread Pointer or by

interchanging the Port B Write Pointer with the Rewrite Pointer.

No command operands are required to perform a reread/

rewrite operation.

When Port B of the BiFIFO is in peripheral mode, the DMA

direction is controlled by the Command Register. Table 5

shows the Port B read/write DMA direction operands.

Two commands are provided to increment the Port B Read

and Write Pointers. No operands are required for these

commands.

COMMAND FORMAT

15

12 11

87

32

0

X

X

X

X

Command Opcode

XXXXX

Figure 3. Format for Commands Written into Port A

Command Operand

2668 tbl 02

5.32

7

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