TC58256AFTI View Datasheet(PDF) - Toshiba

Part Name

Description

Manufacturer

TC58256AFTI

256-MBIT (32M X 8 BITS) CMOS NAND E2PROM

Toshiba 

TC58256AFTI

(11) When four address cycles are input

Although the device may read in a fourth address, it is ignored inside the chip.

Read operation

CLE

CE

WE

ALE

I/O

RY/BY

00H, 01H, 50H

Address input

Internal read operation starts when WE goes High in the third cycle.

Figure 22.

Ignored

Program operation

CLE

CE

WE

ALE

I/O

80H

Address input

Ignored

Figure 23.

Data input

2001-05-30 29/33

Share Link: