SN54LS290 View Datasheet(PDF) - ON Semiconductor
Part Name
Description
Manufacturer
SN54LS290 Datasheet PDF : 7 Pages
| |||
SN74LS290
DECADE COUNTER;
4-BIT BINARY COUNTER
The SN54/74LS290 and SN54/74LS293 are high-speed 4-bit
ripple type counters partitioned into two sections. Each counter has a
divide-by-two section and either a divide-by-five (LS290) or
divide-by-eight (LS293) section which are triggered by a
HIGH-to-LOW transition on the clock inputs. Each section can be
used separately or tied together (Q to CP)to form BCD, Bi-quinary, or
Modulo-16 counters. Both of the counters have a 2-input gated Master
Reset (Clear), and the LS290 also has a 2-input gated Master Set
(Preset 9).
• Corner Power Pin Versions of the LS90 and LS93
• Low Power Consumption . . . Typically 45 mW
• High Count Rates . . . Typically 42 MHz
• Choice of Counting Modes . . . BCD, Bi-Quinary, Binary
• Input Clamp Diodes Limit High Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC MR MR CP1 CP0 Q0 Q3
14 13 12 11 10 9 8
LS290
NOTE:
The Flatpak version
has the same pinouts (Connection
Diagram) as the Dual In-Line Pack-
age.
1234567
MS NC MS Q2 Q1 NC GND
VCC MR MR CP1 CP0 Q0 Q3
14 13 12 11 10 9 8
http://onsemi.com
DECADE COUNTER;
4-BIT BINARY COUNTER
LOW POWER
SCHOTTKY
14
1
14
1
14
1
J SUFFIX
CERAMIC
CASE 632-08
N SUFFIX
PLASTIC
CASE 646-06
D SUFFIX
SOIC
CASE 751A-02
LS293
1234567
NC NC NC Q2 Q1 NC GND
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
PIN NAMES
LOADING (Note a)
CP0
CP1
CP1
MR1, MR2
MS1, MS2
Q0
Q1, Q2, Q3
Clock (Active LOW going edge) Input to ÷ 2 Section.
Clock (Active LOW going edge) Input to ÷ 5 Section (LS290).
Clock (Active LOW going edge) Input to ÷ 8 Section (LS293).
Master Reset (Clear) Inputs
Master Set (Preset-9, LS290) Inputs
Output from ÷ 2 Section (Notes b & c)
Outputs from ÷ 5 & ÷ 8 Sections (Note b)
HIGH
0.05 U.L.
0.05 U.L.
0.05 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
10 U.L.
LOW
1.5 U.L.
2.0 U.L.
1.0 U.L.
0.25 U.L.
0.25 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 μA HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges.
c) The Q0 Outputs are guaranteed to drive the full fan-out plus the CP1 Input of the device.
© Semiconductor Components Industries, LLC, 2006
1
July, 2006 − Rev. 6
Publication Order Number:
SN74LS290/D
|
|
Share Link: 