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M74HC4028M1R 查看數據表(PDF) - STMicroelectronics

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M74HC4028M1R BCD TO DECIMAL DECODER ST-Microelectronics
STMicroelectronics ST-Microelectronics
M74HC4028M1R Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
M74HC4028
BCD TO DECIMAL DECODER
s HIGH SPEED:
tPD = 20ns (TYP.) at VCC = 6V
s LOW POWER DISSIPATION:
ICC = 4µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4028
DESCRIPTION
The M74HC4028 is an high speed CMOS BCD
TO DECIMAL DECODER fabricated with silicon
gate C2MOS technology.
A BCD code applied to the four inputs (A to D)
provides a high level at the selected one of the
decimal decoded outputs. An illegal BCD code
such as eleven to fifteen gives a low level at all
outputs. The device also can be used as 3 TO 8
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
T&R
DIP
SOP
TSSOP
M74HC4028B1R
M74HC4028M1R M74HC4028RM13TR
M74HC4028TTR
LINE DECODER, when D input is assigned as a
disable input.
The device is useful for code conversion, address
decoding, memory selection, demultiplexing, or
read out decoding.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 2001
1/9
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