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M74HCT245B1R 데이터 시트보기 (PDF) - STMicroelectronics

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M74HCT245B1R HCT640 INVERTING, HCT643 INVERTING/NON INVERTING OCTAL BUS TRANSCEIVER (3-STATE): HCT245 NON INVERTING STMICROELECTRONICS
STMicroelectronics STMICROELECTRONICS
M74HCT245B1R Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
M54/74HCT245/640/643
M54/74HCT245/640/643
OCTAL BUS TRANSCEIVER (3-STATE): HCT245 NON INVERTING
HCT640 INVERTING, HCT643 INVERTING/NON INVERTING
. HIGH SPEED
tPD = 10 ns (TYP.) at VCC = 5V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) at TA = 25 oC
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.) VIL = 0.8V (MAX.)
. OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 6 mA (MIN)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS245/640/643
DESCRIPTION
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCTXXXF1R M74HCTXXXM1R
M74HCTXXXB1R M74HCTXXXC1R
The M54/74HCT245, HCT640 and HCT643 utilise
silicon gate C2MOS technology to achive operating
speeds eqivalent to LSTTL devices.
Along with the low power dissipation and high noise
immunity of standad CMOS integrated circuit, it
possesses the capability to drive 15 LSTTL loads.
These IC’s are intended for two-way asynchronous
communication between data buses, and the
direction of data trasmission is determined by DIR
input. The enable input (G) can be used to disable
the device so that the buses are effectively isolated.
All input are equipped with protection circuits
against static discharge and transient discharge.
These integrated circuits have input and output
characteristics that are fully compatible with 54/74
LSTTL logic families. M54/74HCT devices are
designed to directly interface HSC2MOS systems
with TTL and NMOS components. They are also
plug in replacements for LSTTL devices giving a
reduction of power consumption.
IT IS PROHIBITED TO APPLY A SIGNAL TO A
BUS TERMINAL WHEN IT IS IN OUTPUT MODE
AND WHEN A BUS THERMINAL IS FLOATING
(HIGH IMPEDANCE STATE), IT IS REQUESTED
TO FIX THE INPUT LEVEL BY MEANS OF
EXTERNAL PULL DOWN OR PULL UP
RESISTOR.
PIN CONNECTION (top view)
HCT245
HCT640
HCT643
October 1993
1/11
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