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74VHCT595PW 8-bit serial-in/serial-out or parallel-out shift register with output latches NXP
NXP Semiconductors. NXP
74VHCT595PW Datasheet PDF : 22 Pages
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NXP Semiconductors
74VHC595; 74VHCT595
8-bit serial-in/serial-out or parallel-out shift register with output latches
11. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 13.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max Min Max
Min
Max
74VHC595
tpd
propagation SHCP to Q7S; see Figure 8 [2]
delay
VCC = 3.0 V to 3.6 V
CL = 15 pF
- 5.7 13.0 1.0 15.0
1.0
16.5 ns
CL = 50 pF
- 7.7 16.5 1.0 18.5
1.0
20.1 ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
- 4.0 8.2 1.0
9.4
1.0
10.5 ns
CL = 50 pF
- 5.4 10.0 1.0 11.4
1.0
12.5 ns
STCP to Qn; see Figure 9
[2]
VCC = 3.0 V to 3.6 V
CL = 15 pF
- 5.9 11.9 1.0 13.5
1.0
15.0 ns
CL = 50 pF
- 7.7 15.4 1.0 17.0
1.0
18.5 ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
- 4.2 7.4 1.0
8.5
1.0
9.5 ns
CL = 50 pF
- 5.5 9.0 1.0
10.5
1.0
11.5 ns
MR to Q7S; see Figure 11
[3]
VCC = 3.0 V to 3.6 V
CL = 15 pF
- 5.9 12.8 1.0 13.7
1.0
15.0 ns
CL = 50 pF
- 7.4 16.3 1.0 17.2
1.0
18.7 ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
- 4.4 8.0 1.0
9.1
1.0
10.0 ns
CL = 50 pF
- 5.6 10.0 1.0 11.1
1.0
12.0 ns
ten
enable time OE to Qn; see Figure 12
[4]
VCC = 3.0 V to 3.6 V
CL = 15 pF
- 5.6 11.5 1.0 13.5
1.0
15.0 ns
CL = 50 pF
- 7.4 15.0 1.0 17.0
1.0
18.5 ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
- 4.0 8.6 1.0
10.0
1.0
11.0 ns
CL = 50 pF
- 5.3 10.6 1.0 12.0
1.0
13.0 ns
tdis
disable time OE to Qn; see Figure 12
[5]
VCC = 3.0 V to 3.6 V
CL = 15 pF
- 5.4 11.0 1.0 13.0
1.0
14.5 ns
CL = 50 pF
- 8.7 15.7 1.0 16.2
1.0
17.5 ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
- 3.8 8.0 1.0
9.5
1.0
10.5 ns
CL = 50 pF
- 5.8 10.3 1.0 11.0
1.0
12.0 ns
74VHC_VHCT595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 July 2012
© NXP B.V. 2012. All rights reserved.
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