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74VHCT595PW 8-bit serial-in/serial-out or parallel-out shift register with output latches NXP
NXP Semiconductors. NXP
74VHCT595PW Datasheet PDF : 22 Pages
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NXP Semiconductors
74VHC595; 74VHCT595
8-bit serial-in/serial-out or parallel-out shift register with output latches
6. Pinning information
6.1 Pinning
Q1 1
Q2 2
Q3 3
Q4 4
Q5 5
Q6 6
Q7 7
GND 8
74VHC595
74VHCT595
16 VCC
15 Q0
14 DS
13 OE
12 STCP
11 SHCP
10 MR
9 Q7S
001aak048
Fig 5. Pin configuration SO16 and TSSOP16
terminal 1
index area
74VHC595
74VHCT595
Q2 2
Q3 3
Q4 4
Q5 5
Q6 6
Q7 7
GND(1)
15 Q0
14 DS
13 OE
12 STCP
11 SHCP
10 MR
001aak049
Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 6. Pin configuration DHVQFN16
6.2 Pin description
Table 2.
Symbol
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND
Q7S
MR
SHCP
STCP
OE
DS
Q0
VCC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
parallel data output 1
parallel data output 2
parallel data output 3
parallel data output 4
parallel data output 5
parallel data output 6
parallel data output 7
ground (0 V)
serial data output
master reset (active LOW)
shift register clock input
storage register clock input
output enable input (active LOW)
serial data input
parallel data output 0
supply voltage
74VHC_VHCT595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 July 2012
© NXP B.V. 2012. All rights reserved.
4 of 22
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