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74VHCT595PW 8-bit serial-in/serial-out or parallel-out shift register with output latches NXP
NXP Semiconductors. NXP
74VHCT595PW Datasheet PDF : 22 Pages
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NXP Semiconductors
74VHC595; 74VHCT595
8-bit serial-in/serial-out or parallel-out shift register with output latches
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Test data is given in Table 9.
Definitions for test circuit:
CL = load capacitance including jig and probe capacitance.
RL = load resistance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
S1 = test selection switch.
Fig 13. Load circuitry for switching times
Table 9. Test data
Type
Input
74VHC595
74VHCT595
VI
VCC
3.0 V
tr, tf
3.0 ns
3.0 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 k
1 k
S1 position
tPHL, tPLH
open
open
tPZH, tPHZ
GND
GND
tPZL, tPLZ
VCC
VCC
74VHC_VHCT595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 July 2012
© NXP B.V. 2012. All rights reserved.
15 of 22
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