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74VHCT595PW 8-bit serial-in/serial-out or parallel-out shift register with output latches NXP
NXP Semiconductors. NXP
74VHCT595PW Datasheet PDF : 22 Pages
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NXP Semiconductors
74VHC595; 74VHCT595
8-bit serial-in/serial-out or parallel-out shift register with output latches
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 13.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max Min Max
Min
Max
ten
enable time OE to Qn; see Figure 12
CL = 15 pF
CL = 50 pF
tdis
disable time OE to Qn; see Figure 12
CL = 15 pF
CL = 50 pF
fmax
maximum SHCP and STCP;
frequency see Figure 8 and 9
[4]
- 4.8 9.0 1.0 11.0
1.0
12.0 ns
- 6.2 11.6 1.0 13.0
1.0
14.5 ns
[5]
- 3.6 6.9 1.0
8.0
1.0
9.0 ns
- 5.8 10.3 1.0 11.0
1.0
12.0 ns
130 170 - 110
-
90
-
MHz
tW
pulse width SHCP HIGH or LOW;
see Figure 8
5.0 -
- 5.0
-
5.0
-
ns
STCP HIGH or LOW;
see Figure 9
5.0 -
- 5.0
-
5.0
-
ns
MR LOW; see Figure 11
5.0 -
- 5.0
-
5.0
-
ns
tsu
set-up time DS to SHCP; see Figure 9
SHCP to STCP;
see Figure 10
3.0 -
- 3.0
-
3.0
-
ns
5.0 -
- 5.0
-
5.0
-
ns
th
hold time DS to SHCP; see Figure 10
trec
recovery MR to SHCP; see Figure 11
time
2.0 -
- 2.0
-
2.0
3.0 -
- 3.0
-
3.0
-
ns
-
ns
CPD
power
fi = 1 MHz; VI = GND to VCC [6] - 190 -
-
-
-
-
pF
dissipation
[7]
capacitance
[1] Typical values are measured at nominal supply voltage.
[2] tpd is the same as tPHL and tPLH.
[3] tpd is the same as tPHL only.
[4] ten is the same as tPZL and tPZH.
[5] tdis is the same as tPLZ and tPHZ.
[6] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
(CL VCC2 fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in V.
[7] All 9 outputs switching.
74VHC_VHCT595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 July 2012
© NXP B.V. 2012. All rights reserved.
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