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74VHCT595PW 8-bit serial-in/serial-out or parallel-out shift register with output latches NXP
NXP Semiconductors. NXP
74VHCT595PW Datasheet PDF : 22 Pages
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NXP Semiconductors
74VHC595; 74VHCT595
8-bit serial-in/serial-out or parallel-out shift register with output latches
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 13.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max Min Max
Min
Max
fmax
maximum SHCP or STCP;
frequency see Figure 8 and 9
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
tW
pulse width SHCP HIGH or LOW;
see Figure 8
80 125 - 60
-
40
130 170 - 110
-
90
-
MHz
-
MHz
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
STCP HIGH or LOW;
see Figure 9
5.0 -
- 5.0
-
5.0
-
ns
5.0 -
- 5.0
-
5.0
-
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
MR LOW; see Figure 11
5.0 -
- 5.0
-
5.0
-
ns
5.0 -
- 5.0
-
5.0
-
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
tsu
set-up time DS to SHCP; see Figure 9
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
SHCP to STCP;
see Figure 10
5.0 -
- 5.0
-
5.0
-
ns
5.0 -
- 5.0
-
5.0
-
ns
3.5 -
- 3.5
-
3.5
-
ns
3.0 -
- 3.0
-
3.0
-
ns
VCC = 3.0 V to 3.6 V
8.5 -
- 8.5
-
8.5
-
ns
VCC = 4.5 V to 5.5 V
5.0 -
- 5.0
-
5.0
-
ns
th
hold time DS to SHCP; see Figure 10
VCC = 3.0 V to 3.6 V
1.5 -
- 1.5
-
1.5
-
ns
VCC = 4.5 V to 5.5 V
2.0 -
- 2.0
-
2.0
-
ns
trec
recovery MR to SHCP; see Figure 11
time
VCC = 3.0 V to 3.6 V
3.0 -
- 3.0
-
3.0
-
ns
VCC = 4.5 V to 5.5 V
2.5 -
- 2.5
-
2.5
-
ns
CPD
power
fi = 1 MHz; VI = GND to VCC [6] - 180 -
-
-
-
-
pF
dissipation
[7]
capacitance
74VHCT595; VCC = 4.5 V to 5.5 V
tpd
propagation SHCP to Q7S; see Figure 8 [2]
delay
CL = 15 pF
- 3.8 8.2 1.0
9.0
1.0
10.0 ns
CL = 50 pF
- 5.2 10.0 1.0 11.0
1.0
12.0 ns
STCP to Qn; see Figure 9
[2]
CL = 15 pF
- 4.0 7.4 1.0
8.5
1.0
9.5 ns
CL = 50 pF
- 5.3 9.0 1.0
10.5
1.0
11.5 ns
MR to Q7S; see Figure 11
[3]
CL = 15 pF
CL = 50 pF
- 4.6 8.2 1.0
9.5
1.0
10.5 ns
- 5.8 10.5 1.0 11.5
1.0
12.5 ns
74VHC_VHCT595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 July 2012
© NXP B.V. 2012. All rights reserved.
10 of 22
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