Nexperia
74ALVC164245
16-bit dual supply translating transceiver; 3-state
VI
G
VCC
VO
DUT
RT
VEXT
RL
CL
RL
mna616
Fig 7.
Test data is given in Table 9.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
Test circuit for measuring switching times
Table 9. Test data
Direction
Supply voltage
nAn port to nBn
port
VCC(A)
2.3 V to 2.7 V
VCC(B)
2.7 V to 3.6 V
nBn port to nAn 2.3 V to 2.7 V 2.7 V to 3.6 V
port
nAn port to nBn 2.7 V to 3.6 V 4.5 V to 5.5 V
port
nBn port to nAn 2.7 V to 3.6 V 4.5 V to 5.5 V
port
Load
CL
50 pF
50 pF
50 pF
50 pF
RL
500
500
500
500
VEXT
tPLH, tPHL
open
open
open
open
tPZH, tPHZ
GND
GND
GND
GND
tPZL, tPLZ
2 VCC
6.0 V
2 VCC
6.0 V
74ALVC164245
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 15 March 2012
© Nexperia B.V. 2017. All rights reserved
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