74ALVC164245DGG(2010) View Datasheet(PDF) - NXP Semiconductors.
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Description
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74ALVC164245DGG Datasheet PDF : 20 Pages
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NXP Semiconductors
74ALVC164245
16-bit dual supply translating transceiver; 3-state
Table 7. Dynamic characteristics …continued
GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF; for test circuit see Figure 7.
Symbol Parameter
Conditions
Tamb = −40 °C to +85 °C
Min Typ[1] Max
CPD
power
5 V port: nAn to nBn;
[3][4]
dissipation
VCC(B) = 5 V; VCC(A) = 3.3 V
capacitance
outputs enabled
-
30
-
outputs disabled
-
15
-
3 V port: nBn to nAn;
[3][4]
VCC(B) = 5 V; VCC(A) = 3.3 V
outputs enabled
-
40
-
outputs disabled
-
5
-
Tamb = −40 °C to +125 °C Unit
Min
Max
-
-
pF
-
-
pF
-
-
pF
-
-
pF
[1] All typical values are measured at nominal voltage for VCC(B) and VCC(A) and at Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of outputs.
[4] The condition is VI = GND to VCC.
11. AC waveforms
VI
nAn, nBn
input
GND
VOH
nBn, nAn
output
VOL
tPHL
VM
VM
tPLH
001aaa792
Fig 5.
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Input (nAn, nBn) to output (nBn, nAn) propagation delays
74ALVC164245_5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
© NXP B.V. 2010. All rights reserved.
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