74ALVC162834ADGG View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
74ALVC162834ADGG
NXP Semiconductors.
74ALVC162834ADGG Datasheet PDF : 15 Pages
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Nexperia
74ALVC162834A
18-bit registered driver with inverted register enable and 30 Ω termination resistors; 3-state
Symbol Parameter
fmax
maximum
frequency
CPD
power dissipation
capacitance
Conditions
VCC = 3.0 V to 3.6 V
An to LE; Figure 7
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
CP; Figure 8
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
per driver; VI = GND to VCC
transparent mode; output enabled
transparent mode; output disabled
clocked mode; output enabled
clocked mode; output disabled
[1] Typical values are measured at Tamb = 25 °C
Typical values for VCC = 2.3 V to 2.7 V are measured at VCC = 2.5 V
Typical values for VCC = 3.0 V to 3.6 V are measured at VCC = 3.3 V
[2] tpd is the same as tPHL and tPLH.
[3] ten is the same as tPZH and tPZL.
[4] tdis is the same as tPHZ and tPLZ.
[5] CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD × VCC2 × fi × N +∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
Min Typ [1] Max Unit
0.9
0.7
- ns
0.5
0.1
1.0
0.1
1.0
0.4
- ns
- ns
- ns
150
190
150
190
150
240
[5]
-
10
-
3
-
21
-
15
- MHz
- MHz
- MHz
- pF
- pF
- pF
- pF
74ALVC162834A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 13 June 2017
© Nexperia B.V. 2017. All rights reserved.
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