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AR0141CS2C00SUEA0-DP(2015) View Datasheet(PDF) - ON Semiconductor

Part Name
Description
Manufacturer
AR0141CS2C00SUEA0-DP
(Rev.:2015)
ON-Semiconductor
ON Semiconductor ON-Semiconductor
AR0141CS2C00SUEA0-DP Datasheet PDF : 63 Pages
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AR0141CS: 1/4-Inch Digital Image Sensor
Slave Mode
Figure 26: Slave Mode Example with Equal Integration and Frame Readout Periods
The integration of the last row is started before the end of the programmed integration for the first row.
Frame
Valid
VD Signal
Rising
Edge
Rising
Edge
Slave Mode
Trigger
Row 0
Inactive
Active
Rising edge of VD
signal triggers the start
of the frame readout.
Inactive
Row reset and read
operations begin
after the rising edge
of the VD signal.
Rising
Edge
Active
Row Reset
(start of integration)
Row Readout
Programmed Integration
Integration due to
Slave Mode Delay
Row N
The Slave Mode will become
“Active” after the last row period.
Both the row reset and row read
operations will wait until the rising
edge of the VD signal.
The row shutter and read operations will stop when the slave mode becomes active and
is waiting for the VD signal. The following should be considered when configuring the
sensor to use the slave mode:
1. The frame period (TFRAME) should be configured to be less than the period of the
input VD signal. The sensor will disregard the input VD signal if it appears before the
frame readout is finished.
2. If the sensor integration time is configured to be less than the frame period, then the
sensor will not have reset all of the sensor rows before it begins waiting for the input
VD signal. This error can be minimized by configuring the frame period to be as close
as possible to the desired frame rate (period between VD signals).
AR0141CS DS Rev. D Pub. 6/15 EN
31
©Semiconductor Components Industries, LLC, 2015.
 

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