AS5040 10-BIT PROGRAMMABLE MAGNETIC ROTARY ENCODER
Commutation - Mode 3.2 (Two-pole-pairs)
Width: 256 Steps
Width: 256 Steps
U
V
W
CW Direction
Position: 0
Angle: 0.0
85
29.88
171
60.12
256 341 427 512 597 683 768 853 939
0
90.0
119.88 150.12
180.0
209.88 240.12 270.00 299.88 330.12
360.0
Figure 12: U, V and W-signals for 2pole BLDC motor commutation (Div1=1; Div0=0)
9 Programming the AS5040
After power-on, programming the AS5040 is enabled with
the rising edge of CSn with Prog = high and CLK = low.
16 bit configuration data must be serially shifted into the
OTP register via the Prog-pin. The first “CCW” bit is
followed by the zero position data (MSB first) and the
incremental mode setting as shown in Table 6. Data must
be valid at the rising edge of CLK (see Figure 13).
After writing data into the OTP register it can be
permanently programmed by rising the Prog pin to the
programming voltage VPROG. 16 CLK pulses (tPROG) must
be applied to program the fuses (Figure 14). To exit the
programming mode, the chip must be reset by a power-
on-reset. The programmed data is available after the
next power-up.
Note: During the programming process, the transitions in
the programming current may cause high voltage spikes
generated by the inductance of the connection cable. To
avoid these spikes and possible damage to the IC, the
connection wires, especially the signals Prog and VSS
must be kept as short as possible. The maximum wire
length between the VPROG switching transistor and pin
Prog (see Figure 15) should not exceed 50mm
(2 inches). To suppress eventual voltage spikes, a 10nF
ceramic capacitor should be connected close to pins
Prog and VSS. This capacitor is only required for
programming, it is not required for normal operation.
The clock timing tclk must be selected at a proper rate to
ensure that the signal Prog is stable at the rising edge of
CLK (see Figure 13). Additionally, the programming
supply voltage should be buffered with a 10µF capacitor
mounted close to the switching transistor. This capacitor
aids in providing peak currents during programming.
The specified programming voltage at pin Prog is 7.3 –
7.5V (see section 16.7). To compensate for the voltage
drop across the VPROG switching transistor, the applied
programming voltage may be set slightly higher (7.5 -
8.0V, see Figure 15).
OTP Register Contents:
CCW Counter Clockwise Bit
ccw=0 – angular value increases in clockwise direction
ccw=1 – angular value increases in counterclockwise
direction
Z [9:0] Programmable Zero / Index Position
Indx Index Pulse Width Selection: 1LSB / 3LSB
Div1,Div0
Divider Setting of Incremental Output
Md1, Md0
Incremental Output Mode Selection
9.1 OTP Default Setting
The AS5040 can also be operated without programming.
The default, un-programmed setting is shown in Table 6
(Mode 0.0):
CCW: 0
= clockwise operation
Z9 to Z0: 00
= no programmed zero position
Indx: 0
= Index bit width = 1LSB
Div0,Div1 : 00 = incremental resolution = 10bit
Md0, MD1: 00 = incremental mode = quadrature
Revision 1.6, 03-Oct-06
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