AS5040 − 3.3V / 5V Operation
3.3V / 5V Operation
The AS5040 operates either at 3.3V ±10% or at 5V ±10%. This
is made possible by an internal 3.3V Low-Dropout (LDO) voltage
regulator. The internal supply voltage is always taken from the
output of the LDO, meaning that the internal blocks are always
operating at 3.3V.
For 3.3V operation, the LDO must be bypassed by connecting
VDD3V3 with VDD5V (see Figure 39).
For 5V operation, the 5V supply is connected to pin VDD5V,
while VDD3V3 (LDO output) must be buffered by a 2.2...10μF
capacitor, which is supposed to be placed close to the supply
pin (see Figure 39).
The VDD3V3 output is intended for internal use only It must not
be loaded with an external load.
The output voltage of the digital interface I/O’s corresponds to
the voltage at pin VDD5V, as the I/O buffers are supplied from
this pin (see Figure 39).
Figure 39:
Connections for 5V / 3.3V Supply Voltages
5V Operation
100n
VDD5V
VDD3V3
LDO
2.2...10μF
Internal
VDD
I
4.5 - 5.5V
N
T
E
R
F
A
C
E
VSS
DO
PWM_LSB
CLK
CSn
A_LSB_U
B_Dir_V
Index_W
Prog
3.3V Operation
VDD3V3
VDD5V
LDO
3.0 - 3.6V
VSS
Internal
VDD
I
N
T
E
R
F
A
C
E
100n
DO
PWM_LSB
CLK
CSn
A_LSB_U
B_Dir_V
Index_W
Prog
A buffer capacitor of 100nF is recommended in both cases close
to pin VDD5V. Note that pin VDD3V3 must always be buffered
by a capacitor. It must not be left floating, as this may cause an
instable internal 3.3V supply voltage which may lead to larger
than normal jitter of the measured angle.
Page 38
Document Feedback
ams Datasheet
[v2-12] 2017-Jun-20