M1A3P600-1FG144YI View Datasheet(PDF) -
M1A3P600-1FG144YI Datasheet PDF : 0 Pages
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ProASIC3 Flash Family FPGAs
Table 2-46 • 3.3 V LVTTL / 3.3 V LVCMOS Low Slew
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
Applicable to Standard I/O Banks
Drive
Strength
2 mA
Speed
Grade
Std.
tDOUT
0.66
tDP
9.46
tDIN
0.04
tPY
1.00
tEOUT
0.43
tZL
9.64
tZH
8.54
tLZ
2.07
tHZ
2.04
Units
ns
–1
0.56
8.05 0.04 0.85 0.36
8.20
7.27 1.76 1.73
ns
–2
0.49
7.07 0.03 0.75 0.32
7.20
6.38 1.55 1.52
ns
4 mA
Std.
0.66
9.46 0.04 1.00 0.43
9.64
8.54 2.07 2.04
ns
–1
0.56
8.05 0.04 0.85 0.36
8.20
7.27 1.76 1.73
ns
–2
0.49
7.07 0.03 0.75 0.32
7.20
6.38 1.55 1.52
ns
6 mA
Std.
0.66
6.57 0.04 1.00 0.43
6.69
5.98 2.40 2.57
ns
–1
0.56
5.59 0.04 0.85 0.36
5.69
5.09 2.04 2.19
ns
–2
0.49
4.91 0.03 0.75 0.32
5.00
4.47 1.79 1.92
ns
8 mA
Std.
0.66
6.57 0.04 1.00 0.43
6.69
5.98 2.40 2.57
ns
–1
0.56
5.59 0.04 0.85 0.36
5.69
5.09 2.04 2.19
ns
–2
0.49
4.91 0.03 0.75 0.32
5.00
4.47 1.79 1.92
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Revision 13
2- 37
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