M1A3P400-2FGG144PP View Datasheet(PDF) -

ProASIC3 DC and Switching Characteristics

Table 2-26 • Summary of I/O Timing Characteristics—Software Default Settings

–2 Speed Grade, Commercial-Case Conditions: TJ = 70°C, Worst Case VCC = 1.425 V,

Worst-Case VCCI (per standard)

Standard I/O Banks

I/O Standard

3.3 V LVTTL / 8 mA 8 mA High 35

3.3 V LVCMOS

– 0.45 3.29 0.03 0.75 0.32 3.36 2.80 1.79 2.01 ns

3.3 V LVCMOS 100 µA 8 mA High 35

Wide Range2

– 0.45 5.09 0.03 1.13 0.32 5.09 4.25 2.77 3.11 ns

2.5 V LVCMOS 8 mA 8 mA High 35 – 0.45 3.56 0.03 0.96 0.32 3.40 3.56 1.78 1.91 ns

1.8 V LVCMOS 4 mA 4 mA High 35 – 0.45 4.74 0.03 0.90 0.32 4.02 4.74 1.80 1.85 ns

1.5 V LVCMOS 2 mA 2 mA High 35 – 0.45 5.71 0.03 1.06 0.32 4.71 5.71 1.83 1.83 ns

Notes:

1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 µA. Drive

strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.

2. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD-8B specification.

3. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.

2-24

Revision 13

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