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LPC8N04 View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
Manufacturer
LPC8N04 Datasheet PDF : 39 Pages
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NXP Semiconductors
LPC8N04
32-bit ARM Cortex-M0+ microcontroller
7. Pinning information
7.1 Pinning
7.1.1 HVQFN24 package
Figure 2 shows the pad layout of the LPC8N04 in the HVQFN24 package.
terminal 1
index area
PIO0_0/WAKEUP 1
PIO0_1/CLKOUT 2
PIO0_2/SSEL 3
PIO0_6/SCLK 4
PIO0_8/MISO 5
PIO0_9/MOSI 6
25 VSS
18 (reserved)
17 (reserved)
16 PIO0_11/CT32B_M1/SWDIO
15 PIO0_10/CT32B_M0/SWCLK
14 PIO0_3/CT16B_M0
13 PIO0_7/CT16B_M1
aaa-015349
Transparent top view
Fig 2. Pad configuration HVQFN24
Table 3. Pad allocation table of the HVQFN24 package
Pad Symbol
Pad Symbol
1
PIO0_0/WAKEUP
13[1] PIO0_7/CT16B_M1
2
PIO0_1/CLKOUT
14[1] PIO0_3/CT16B_M0
3
PIO0_2/SSEL
15[1] PIO0_10/CT32B_M0/SWCLK
4
PIO0_6/SCLK
16[1] PIO0_11/CT32B_M1/SWDIO
5
PIO0_8/MISO
17[2] RESERVED
6
PIO0_9/MOSI
18[2] RESERVED
7
VDDBAT
19
LB
8
VSS
20
LA
9
RESETN
21[2] RESERVED
10
RESERVED
22[2] RESERVED
11
PIO0_4/SCL
23[2] RESERVED
12
PIO0_5/SDA
24[2] RESERVED
[1] High source current pads; see Section 8.6.3.
[2] These pads must be tied to ground.
LPC8N04
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1.3 — 15 March 2018
© NXP Semiconductors N.V. 2018. All rights reserved.
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