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TPS79901-EP View Datasheet(PDF) - Texas Instruments

Part NameTPS79901-EP TI
Texas Instruments TI
Description200-mA, Low-Quiescent Current, Ultra-Low-Noise, High-PSRR Low-Dropout Linear Regulator
TPS79901-EP Datasheet PDF : 27 Pages
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www.ti.com
TPS79901-EP
SBVS330A – SEPTEMBER 2017 – REVISED OCTOBER 2017
Layout Guidelines (continued)
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, limit junction temperature to 125°C maximum. To estimate the margin of safety
in a complete design (including heatsink), increase the ambient temperature until the thermal protection is
triggered; use worst-case loads and signal conditions. For good reliability, thermal protection triggers at least
35°C above the maximum expected ambient condition of a particular application. This configuration produces a
worst-case junction temperature of 125°C at the highest expected ambient temperature and worst-case load.
The internal protection circuitry of the TPS799 is designed to protect against overload conditions. This circuitry is
not intended to replace proper heatsinking. Continuously running the device into thermal shutdown degrades
device reliability.
10.1.2.2 Power Dissipation
The ability to remove heat from the die is different for each package type, presenting different considerations in
the PCB layout. The PCB area around the device that is free of other components moves the head from the
device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the Thermal
Information table near the front of this data sheet. Using heavier copper increases the effectiveness in removing
heat from the device. The addition of plated through-holes to heat-dissipating layers also improves heatsink
effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation is equal to the product of the
output current times the voltage drop across the output pass element, as shown in Equation 2:
PD + ǒVIN*V Ǔ OUT @ IOUT
(2)
10.1.2.3 Package Mounting
Solder pad footprint recommendations for the TPS799 are available from the TI's website at www.ti.com.
10.2 Layout Example
VI
VO
TPS799
CIN
COUT
EN
GND
CNR
Represents via used for
application specific connections.
Figure 30. Layout Example
Copyright © 2017, Texas Instruments Incorporated
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