DatasheetQ Logo
Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits

74ALVC245WM(2005) View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
74ALVC245WM Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
September 2001
Revised March 2005
74ALVC245
Low Voltage Bidirectional Transceiver
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The T/R input determines the direction
of data flow. The OE input disables both the A and B ports
by placing them in a high impedance state.
The 74ALVC245 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74ALVC245 is fabricated with an advanced CMOS
technology to achieve high-speed operation while main-
taining low CMOS power dissipation.
Features
s 1.65V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s Power-off high impedance inputs and outputs
s Supports Live Insertion and Withdrawal (Note 1)
s tPD
3.4 ns max for 3.0V to 3.6V VCC
3.9 ns max for 2.3V to 2.7V VCC
6 ns max for 1.65V to 1.95V VCC
s Uses patented Quiet Series¥ noise/EMI reduction
circuitry
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model ! 2000V
Machine model ! 200V
Note 1: To ensure the high impedance state during power up and power
down, OEn should be tied to VCC through a pull up resistor. The minimum
value of the resistor is determined by the current sourcing capability of the
driver.
Ordering Code:
Order Number
Package
Number
Package Description
74ALVC245WM
M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ALVC245MTC
MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ALVC245MTCX_NL MTC20 Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
(Note 2)
Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Note 2: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
Pin Descriptions
Pin Names
Description
OE
T/R
A0–A7
B0–B7
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
Quiet Series¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation DS500647
www.fairchildsemi.com
 

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]