74ABT374CPC View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

Manufacturer

74ABT374CPC

Octal D-Type Flip-Flop with 3-STATE Outputs

Fairchild Semiconductor 

November 1992

Revised March 2005

74ABT374

Octal D-Type Flip-Flop with 3-STATE Outputs

General Description

The ABT374 is an octal D-type flip-flop featuring separate

D-type inputs for each flip-flop and 3-STATE outputs for

bus-oriented applications. A buffered Clock (CP) and Out-

put Enable (OE) are common to all flip-flops.

Features

s Edge-triggered D-type inputs

s Buffered positive edge-triggered clock

s 3-STATE outputs for bus-oriented applications

s Output sink capability of 64 mA, source capability of

32 mA

s Guaranteed output skew

s Guaranteed multiple output switching specifications

s Output switching specified for both 50 pF and 250 pF

loads

s Guaranteed simultaneous switching, noise level and

dynamic threshold performance

s Guaranteed latchup protection

s High impedance glitch free bus loading during entire

power up and power down cycle

s Non-destructive hot insertion capability

Ordering Code:

Order Number

Package

Number

Package Description

74ABT374CSC

M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74ABT374CSCX_NL M20B Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

(Note 1)

74ABT374CSJ

M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74ABT374CMSA

MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

74ABT374CMTC

MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74ABT374CPC

N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Connection Diagram

Pin Descriptions

Pin Names

Description

D0–D7

CP

Data Inputs

Clock Pulse Input (Active Rising Edge)

OE

3-STATE Output Enable Input (Active LOW)

O0–O7

3-STATE Outputs

© 2005 Fairchild Semiconductor Corporation DS011510

www.fairchildsemi.com

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