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MUN5311DW1T1 View Datasheet(PDF) - ON Semiconductor

Part NameDescriptionManufacturer
MUN5311DW1T1 Dual Bias Resistor Transistors ON-Semiconductor
ON Semiconductor ON-Semiconductor
MUN5311DW1T1 Datasheet PDF : 35 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MUN5311DW1T1 Series
Preferred Devices
Dual Bias Resistor
Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a baseemitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the MUN5311DW1T1 series,
two complementary BRT devices are housed in the SOT363 package
which is ideal for low power surface mount applications where board
space is at a premium.
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Available in 8 mm, 7 inch/3000 Unit Tape and Reel
PbFree Packages are Available
MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1
and Q2, minus sign for Q1 (PNP) omitted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
VCBO
Collector-Emitter Voltage
VCEO
Collector Current
IC
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Symbol
Total Device Dissipation
PD
TA = 25°C
Derate above 25°C
Thermal Resistance
Junction-to-Ambient
Characteristic
(Both Junctions Heated)
Total Device Dissipation
TA = 25°C
Derate above 25°C
RqJA
Symbol
PD
Thermal Resistance
Junction-to-Ambient
Thermal Resistance
Junction-to-Lead
Junction and Storage Temperature
1. FR4 @ Minimum Pad
2. FR4 @ 1.0 x 1.0 inch Pad
RqJA
RqJL
TJ, Tstg
50
50
100
Max
187 (Note 1)
256 (Note 2)
1.5 (Note 1)
2.0 (Note 2)
670 (Note 1)
490 (Note 2)
Max
250 (Note 1)
385 (Note 2)
2.0 (Note 1)
3.0 (Note 2)
493 (Note 1)
325 (Note 2)
188 (Note 1)
208 (Note 2)
55 to +150
Vdc
Vdc
mAdc
Unit
mW
mW/°C
°C/W
Unit
mW
mW/°C
°C/W
°C/W
°C
© Semiconductor Components Industries, LLC, 2005
1
December, 2005 Rev. 11
http://onsemi.com
(3)
(2)
(1)
R1
R2
Q1
Q2
R2
R1
(4)
(5)
(6)
6
1
SOT363
CASE 419B
STYLE 1
MARKING DIAGRAM
6
xx M G
G
1
xx
= Device Code
M
= Date Code*
G
= PbFree Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
ORDERING AND DEVICE MARKING
INFORMATION
See detailed ordering, shipping, and specific marking
information in the table on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
MUN5311DW1T1/D
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