Philips Semiconductors
P-channel enhancement mode vertical
D-MOS transistor
Product specification
BSP205
handbook, halfpage
VDD = −50 V
0V
−10 V
50 Ω
ID
MBB689
handbook, halfpage
INPUT
10 %
90 %
OUTPUT
90 %
ton
10 %
toff
MBB690
Fig.2 Switching time test circuit.
Fig.3 Input and output waveforms.
−103
handbook, halfpage
ID
(mA)
−102
MDA741
VGS = −10 V
−7.5 V
−6 V
−5 V
−4.5 V
−10
6
8
10
12
14
16
18
RDSon (Ω)
−0.8
handbook, halfpage
ID
(A)
−0.6
MDA751
−0.4
−0.2
0
0
−2
−4
−6
−8
−10
VGS (V)
Fig.4 ON-resistance as a function of drain
current; Tj = 25 °C; typical values.
April 1995
Fig.5 Transfer characteristics; −VDS = 10 V;
Tj = 25 °C; typical values.
5