74LVT16543MTD View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

Manufacturer

74LVT16543MTD

Low Voltage 16-Bit Registered Transceiver with 3-STATE Outputs

Fairchild Semiconductor 

January 2000

Revised October 2001

74LVT16543 • 74LVTH16543

Low Voltage 16-Bit Registered Transceiver

with 3-STATE Outputs

General Description

The LVT16543 and LVTH16543 16-bit transceivers

contain two sets of D-type latches for temporary storage of

data flowing in either direction. Separate Latch Enable and

Output Enable inputs are provided for each register to per-

mit independent control of inputting and outputting in either

direction of data flow. Each byte has separate control

inputs, which can be shorted together for full 16-bit opera-

tion.

The LVTH16543 data inputs include bushold, eliminating

the need for external pull-up resistors to hold unused

inputs.

These transceivers are designed for low-voltage (3.3V)

VCC applications, but with the capability to provide a TTL

interface to a 5V environment. The LVT16543 and

LVTH16543 are fabricated with an advanced BiCMOS

technology to achieve high speed operation similar to 5V

ABT while maintaining low power dissipation.

Features

s Input and output interface capability to systems at

5V VCC

s Bushold data inputs eliminate the need for external

pull-up resistors to hold unused inputs (74LVTH16543)

s Also available without bushold feature (74LVT16543)

s Live insertion/extraction permitted

s Power Up/Down high impedance provides glitch-free

bus loading

s Outputs source/sink −32 mA/+64 mA

s Functionally compatible with the 74 series 16543

s Latch-up conforms to JEDEC JED78

s ESD performance:

Human-body model > 2000V

Machine model > 200V

Charged-device model > 1000V

Ordering Code:

Order Number Package Number

Package Description

74LVT16543MEA

(Preliminary)

MS56A

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

74LVT16543MTD

(Preliminary)

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

74LVTH16543MEA

MS56A

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

74LVTH16543MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

© 2001 Fairchild Semiconductor Corporation DS012449

www.fairchildsemi.com

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