SST39LF200A_07 View Datasheet(PDF) - Silicon Storage Technology
Part Name
Description
Manufacturer
SST39LF200A_07 Datasheet PDF : 31 Pages
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2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash
SST39LF200A / SST39LF400A / SST39LF800A
SST39VF200A / SST39VF400A / SST39VF800A
Data Sheet
TABLE 10: DC Operating Characteristics
VDD = 3.0-3.6V for SST39LF200A/400A/800A and 2.7-3.6V for SST39VF200A/400A/800A1
Limits
Symbol Parameter
Min
Max
Units Test Conditions
IDD
Power Supply Current
Address input=VILT/VIHT, at f=1/TRC Min,
VDD=VDD Max
Read2
30
mA
CE#=VIL, OE#=WE#=VIH, all I/Os open
Program and Erase
30
mA
CE#=WE#=VIL, OE#=VIH
ISB
Standby VDD Current
20
µA
CE#=VIHC, VDD=VDD Max
ILI
Input Leakage Current
1
µA
VIN=GND to VDD, VDD=VDD Max
ILO
Output Leakage Current
10
µA
VOUT=GND to VDD, VDD=VDD Max
VIL
Input Low Voltage
0.8
VDD=VDD Min
VIH
Input High Voltage
0.7VDD
V
VDD=VDD Max
VIHC
Input High Voltage (CMOS)
VDD-0.3
V
VDD=VDD Max
VOL
Output Low Voltage
0.2
V
IOL=100 µA, VDD=VDD Min
VOH
Output High Voltage
VDD-0.2
V
IOH=-100 µA, VDD=VDD Min
1. Typical conditions for the Active Current shown on the front data sheet page are average values at 25°C
(room temperature), and VDD = 3V for VF devices. Not 100% tested.
2. Values are for 70 ns conditions. See the Multi-Purpose Flash Power Rating application note for further information.
T10.7 1117
TABLE 11: Recommended System Power-up Timings
Symbol
Parameter
Minimum
Units
TPU-READ1 Power-up to Read Operation
100
µs
TPU-WRITE1 Power-up to Program/Erase Operation
100
µs
T11.0 1117
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 12: Capacitance (TA = 25°C, f=1 Mhz, other pins open)
Parameter Description
Test Condition
Maximum
CI/O1
I/O Pin Capacitance
VI/O = 0V
12 pF
CIN1
Input Capacitance
VIN = 0V
6 pF
T12.0 1117
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 13: Reliability Characteristics
Symbol
Parameter
Minimum Specification
Units
Test Method
NEND1,2
TDR1
Endurance
Data Retention
10,000
100
Cycles
Years
JEDEC Standard A117
JEDEC Standard A103
ILTH1
Latch Up
100 + IDD
mA
JEDEC Standard 78
T13.2 1117
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
2. NEND endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating would result in a
higher minimum specification.
©2007 Silicon Storage Technology, Inc.
12
S71117-09-000
2/07
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