M48Z02-150PC1_99 View Datasheet(PDF) - STMicroelectronics
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Description
Manufacturer
M48Z02-150PC1_99 Datasheet PDF : 12 Pages
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M48Z02, M48Z12
Table 8. Power Down/Up Mode AC Characteristics
(TA = 0 to 70°C or –40 to 85°C)
Symbol
Parameter
Min
Max
Unit
tPD
tF (1)
tFB (2)
E or W at VIH before Power Down
VPFD (max) to VPFD (min) VCC Fall Time
VPFD (min) to VSO VCC Fall Time
0
µs
300
µs
10
µs
tR
VPFD(min) to VPFD (max) VCC Rise Time
0
µs
tRB
VSO to VPFD (min) VCC Rise Time
1
µs
tREC
E or W at VIH after Power Up
2
ms
Notes: 1. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring until 50 µs after
VCC passes VPFD (min).
2. VPFD (min) to VSO fall time of less than tFB may cause corruption of RAM data.
Figure 5. Power Down/Up Mode AC Waveforms
VCC
VPFD (max)
VPFD (min)
VSO
tF
tPD
tFB
INPUTS
RECOGNIZED
OUTPUTS
VALID
(PER CONTROL INPUT)
tDR
tRB
DON'T CARE
HIGH-Z
tR
NOTE
tREC
RECOGNIZED
VALID
(PER CONTROL INPUT)
AI00606
Note: Inputs may or may not be recognized at this time. Caution should be taken to keep E high as VCC rises past VPFD(min). Some systems
may perform inadvertent write cycles after VCC rises above VPFD(min) but before normal system operations begin. Even though a power on
reset is being applied to the processor, a reset condition may not occur until after the system clock is running.
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