W25Q16DVTBIG View Datasheet(PDF) - Winbond

Part Name

Description

Manufacturer

W25Q16DVTBIG

3V 16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI

Winbond 

Table of Contents

1. GENERAL DESCRIPTION ............................................................................................................... 5

2. FEATURES....................................................................................................................................... 5

3. PACKAGE TYPES AND PIN CONFIGURATIONS .......................................................................... 6

3.1 Pin Configuration SOIC 150 / 208-mil .................................................................................. 6

3.2 Pad Configuration WSON 6x5-mm / USON 4X3-mm / USON 4X4-mm .............................. 6

3.3 Pin Configuration PDIP 300-mil............................................................................................ 7

3.4 Pin Description SOIC 150/208-mil, WSON 6x5-mm / USON 4x3-mm / PDIP 300-mil ........ 7

3.5 Pin Configuration SOIC 300-mil ........................................................................................... 8

3.6 Pin Description SOIC 300-mil............................................................................................... 8

3.7 Ball Configuration TFBGA 8x6MM ....................................................................................... 9

3.8 Ball Description TFBGA 8x6-mm ......................................................................................... 9

4. PIN DESCRIPTIONS ...................................................................................................................... 10

4.1 Chip Select (/CS)................................................................................................................ 10

4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) .................................. 10

4.3 Write Protect (/WP)............................................................................................................. 10

4.4 HOLD (/HOLD) ................................................................................................................... 10

4.5 Serial Clock (CLK) .............................................................................................................. 10

5. BLOCK DIAGRAM .......................................................................................................................... 11

6. FUNCTIONAL DESCRIPTION ....................................................................................................... 12

6.1 SPI OPERATIONS ............................................................................................................. 12

6.1.1 Standard SPI Instructions .....................................................................................................12

6.1.2 Dual SPI Instructions ............................................................................................................12

6.1.3 Quad SPI Instructions...........................................................................................................12

6.1.4 Hold Function........................................................................................................................12

6.2 WRITE PROTECTION ....................................................................................................... 13

6.2.1 Write Protect Features ..........................................................................................................13

7. STATUS REGISTERS AND INSTRUCTIONS ............................................................................... 14

7.1 STATUS REGISTERS........................................................................................................ 14

7.1.1 BUSY Status (BUSY)............................................................................................................14

7.1.2 Write Enable Latch Status (WEL) .........................................................................................14

7.1.3 Block Protect Bits (BP2, BP1, BP0) ......................................................................................14

7.1.4 Top/Bottom Block Protect Bit (TB) ........................................................................................14

7.1.5 Sector/Block Protect Bit (SEC) .............................................................................................14

7.1.6 Complement Protect Bit (CMP).............................................................................................14

7.1.7 Status Register Protect Bits (SRP1, SRP0) ..........................................................................15

7.1.8 Erase/Program Suspend Status (SUS).................................................................................15

7.1.9 Security Register Lock Bits (LB3, LB2, LB1).........................................................................15

7.1.10 Quad Enable Bit (QE) .........................................................................................................15

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